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# Raspberry Pi with DragonL FPGA
In this project, we will explore
- Creating a custom PCIe video card using KNJN's Dragon-L FPGA board.
- Writing a drm module driver for the said board.
- Testing the said device and module driver on Raspberry Pi Computer Module 4 IO board (and Framework Desktop!)
I will be updating this readme as and when I work on this project, so stay tuned!
## Hardware setup
- [KNJN Dragon-L FPGA board](https://www.knjn.com/FPGA-Dragon-L.html): I chose this FPGA for this project, since it has PCIex1 gen 1 and 3 HDMI ports, I thought we could do some fun experiments with those interfaces, since GPUs also use them anyways. I'm also excited to write my own PCIe drivers and interact with BARs and DMA. I want to see if I can also learn and setup the DRM stack in the process.
- A cheap knockoff Altera USB-Blaster: to write the bitstream onto Dragon-L FPGA Boot-PROM Flash 8MiB
- Framework Desktop motherboard: PCIe Host computer which will run the DRM driver
- Raspberry Pi 4 Compute Module 4 IO board: Same like Framework Desktop
- Developer laptop for generating and writing bitstream to FPGA. Can be done on the host machine, but I want to implement remote GDB on the Host Linux kernel if possible for the future. I'm currently using a Framework 16 running Arch Linux as my developer PC.
## Software setup
- [Xilinx ISE 14.7](https://aur.archlinux.org/packages/xilinx-ise): used synthesize the bitstream for the Dragon-L FPGA
- Only way to use PCIe
- [openFPGALoader](https://trabucayre.github.io/openFPGALoader/guide/install.html): to write the generated bitstream onto the FPGA.
- FOSS (yay!)
- works Altera USB-Blaster as JTAG interface
- Can flash the Xilinx Spartan-6 XC6SLX25T on the Dragon-L
- [Arch Linux](https://archlinux.org/): Running on Framework Desktop, since its easier to test on x86. The PCIe interface on RPi was was not reliable during initial testing.
- [Raspberry Pi OS](https://www.raspberrypi.com/software/operating-systems/): OS Running on Raspberry Pi Computer Moudle 4 IO board (referred to as CM4 here after)
## References
- [YouTube: FPGAs Arent Processors (Unless You Want Them to Be)](https://www.youtube.com/watch?v=d3nuepnbmC4)
- docs from Xilinx ISE for PCIe IP CORE implementation